Semiconductor memory systems comprise a plurality of circuit packs wherein each circuit pack comprises a plurality of individual semiconductor memory chips. Power dissipation within the memory chips generates heat and constrains the packing density of the chips on the circuit packs. It is known that packing density can be increased by distributing power dissipation within a memory system to avoid heat build-up concentrations. One well-known example is to organize memory chips on a circuit pack such that consecutive memory addresses select different memory chips, thus distributing power dissipation over the circuit pack.
In another prior art arrangement, distribution of power dissipation among circuit packs of a memory system is accomplished by organizing the system into a bit-sliced arrangement. In a bit-sliced memory system, each circuit pack provides a defined segment of a memory word. Accordingly, a small number of memory chips are activated on a plurality of circuit packs rather than concentrating the activated memory chips on a single circuit pack. However, bit-sliced memory systems restrict memory growth to relatively large-size growth units. The minimum bit-sliced memory growth unit is a plurality of circuit packs which are required to define a total memory word. Accordingly, in prior art arrangements, memory chips which comprise a memory word are packaged on a single circuit pack concentrating power dissipation but allowing single circuit pack growth units; or the memory chips which comprise a memory word are distributed among the memory circuit packs, thus distributing the power dissipation among the circuit packs of the memory but requiring relatively large-size minimum growth units.